The present invention relates to regu1ated power supplies, and more particularly, to ones with improved response time to a step change in input voltage.
FIG. 1 shows a typical prior art regulated supply. An unregulated DC voltage is received at input terminal 10 from power source 36 and applied to voltage regulator 12, which regulator 12 also receives an error voltage from comparator 14 (described below). Regulator 12 can be of the switching or linear type. A control voltage from regulator 12 is applied to a switching transistor DC to DC converter 16, which converter 16 can optionally receive a trigger signal at input 18. Converter 16 typically provides square waves having a frequency in the kilohertz range to primary winding 20 of transformer T1. Winding 22 is a feedback winding if converter 16 operates in the self-oscillating mode. Thus square waves appear at secondary windings 24, 26, 28 and 30 as shown when regulated by waveforms 301 and 302 in FIG. 3a, which waveforms are at points 1 and 2 of windings 24 and 26, respectively. The waveforms at points 3 and 4 are of opposite polarity to waveforms 302 and 301, respectively. The square waves are rectified, filtered, and then applied to a load. Three such sets of rectifiers and filters are shown: for secondary 24, diodes CR1 and CR2, capacitors C1 and C2, and inductor L1; for secondary 26, diodes CR3 and CR4, capacitors C3 and C4, and inductor L2; for secondary 32, diodes CR5 and CR6, capacitors C5 and C6, and inductor L3. Secondaries 28 ahd 30 would each also have such a set (not shown). Assuming that the DC output voltage at capacitor C2 is the most critical as regards voltage regulation, said voltage is applied to one input of comparator 14, and the other input receiving a reference voltage from source 34. The output voltage of comparator 14 is a function of the difference between said input voltages and comprises the error voltage mentioned above that is applied to regulator 12.
This circuit has at least two disadvantages. First, the voltage drop across diodes CR1 and CR2 increases as the current through them increases. Since the voltage across C2 is kept constant by the regulator, the other DC output voltages will increase with increasing load (lower load resistance) across C2. Second, the regulator response time to a step decrease occuring at time T.sub.1 in FIG. 3 in the unregulated DC voltage at terminal 10 is relatively slow due to the relatively large values of C1, C2 and L1, and also depends on the current through L1, see portion TC of the unregulated waveform 303 shown in FIG. 3b, which waveform is the DC voltage across C2.
It is therefore desirable to provide a regulator circuit that has improved response time and keeps all output voltage constant.